The K3 chip is the result of more than 1,200 days of development. According to the company, it is among the first mass-production-ready RISC-V AI CPUs compliant with the RVA23 specification. It also ...
Today, Google and Qualcomm announced an extension of their partnership to bring RISC-V-based systems-on-chips (SoCs) to market with support for Wear OS, a version of Android for smartwatches and ...
PORTLAND, Ore., Oct. 10, 2024 /PRNewswire/ -- SensiML™ Corporation, a leader in AI software for IoT and a subsidiary of QuickLogic (QUIK), today announced the integration of RISC-V® processor support ...
Can it topple x86 and Arm, or is the gap too wide to close? Feature RISC-V has been talked up as a challenger to Arm and x86, offering an open royalty-free architecture that promises flexibility and ...
Verifying an extensible processor is more than a one-step process, especially when software compatibility is important.
SiFive has announced a partnership with Nvidia to integrate Nvidia’s NVLink Fusion interconnect technology into its forthcoming silicon platforms.
SiFive Inc., a computer chip startup that’s developing processor technology based on the open-source RISC-V instruction set architecture, said today it has raised a hefty $175 million in a late-stage ...
I was discussing with a colleague about the concept of architecture license in RISC-V. I realized that, in the open-source world, it can be a little tricky to grasp. In a traditional processor IP ...
A new instruction set by the original creator of MIPS aims to reinvent the ultra-low power, high-efficiency processor -- and to do so with an architecture that's fundamentally open and available to ...
RISC-V is an open-source instruction set definition managed by RISC-V International. This TechXchange includes content that delves into the architecture and design of a RISC-V processor core. How did ...
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